Anomaly Detection and Mitigation to Improve Hardware Security and Robustness
Artificial Intelligence (AI) is a major workload in many of today’s systems. Anomaly detection to promote functional safety is a critical requirement of many AI powered systems. Machine Learning (ML) systems are trained by very large data sets which could never be exhaustive. Small perturbations to an image can sway neural network models into a wrong conclusions. Research has shown that a well-placed sticker can change the perception of a stop sign to a Speed Limit sign. There is an implicit trust assumption for object detection in autonomous vehicles. Anomaly detection can also be used to identify security attacks or employ feature analysis for contextual authentication. Detecting these anomalies in real-time is just the first step, systems will need to be mitigate these to maintain security and robust operations over the life of the system. Robust AI/ML models and reasoning methods will be used to predict attacks and guide defense mechanisms.
In light of this, as detailed in the Semiconductor Research Corporation (SRC) Decadal Plan for Semiconductors, SRC have been researching on real-time anomaly detection and mitigation to improve hardware security and robustness including AI hardware, automotive electronics and functional safety, and bringing the trustworthiness and robustness of systems to reality in upcoming years and decades.
Enabling Pre-silicon Security Sign-off with ML-augmented Multiphysics Simulation
The emerging need for physical design driven security simulation is motivated by an increasing number of hardware security threats including side-channel leakage analysis, clock/voltage glitching, laser-based fault injection, electromagnetic fault injection, and body bias fault injection. Pre-silicon security analysis and verification has become a critical consideration for almost all designs, including CPU, GPU, networking, IOT, and analog, mixed-signal designs. Security analysis relies on multiphysics simulations that can be further augmented by ML techniques to achieve reasonable performance, such that these security workflows can be incorporated into mainstream design signoff flows like timing, power noise, and physical verification. In this talk, we will cover RTL power and electromagnetic side-channel analysis with ML-augmented techniques as proof-of-concept for comprehensive pre-silicon security signoff.